
Atmel ATWILC1500-MR [PRELIMINARY DATASHEET]
Atmel-42376A-ATWINC1500-MR210P-SmartConnect-Datasheet_102014
12
5.3 UART Interface
Atmel ATWINC1500-MR210P has a Universal Asynchronous Receiver / Transmitter (UART) interface available
on pins J14 and J19. It can be used for control or data transfer if the baud rate is sufficient for a given
application. The UART is compatible with the RS-232 standard, where ATWINC1500-MR210PA operates as
Data Terminal Equipment (DTE). It has a two-pin RXD/TXD interface.
The UART features programmable baud rate generation with fractional clock division, which allows transmission
and reception at a wide variety of standard and non-standard baud rates. The UART input clock is selectable
between 10MHz, 5MHz, 2.5MHz, and 1.25MHz. The clock divider value is programmable as 13 integer bits and
3 fractional bits (with 8.0 being the smallest recommended value for normal operation). This results in the
maximum supported baud rate of 10MHz / 8.0 = 1.25MBd.
The UART can be configured for seven or eight bit operation, with or without parity, with four different parity
types (odd, even, mark, or space), and with one or two stop bits. It also has Rx and Tx FIFOs, which ensure
reliable high speed reception and low software overhead transmission. FIFO size is 4 x 8 for both Rx and Tx
direction. The UART also has status registers showing the number of received characters available in the FIFO
and various error conditions, as well the ability to generate interrupts based on these status bits.
An example of UART receiving or transmitting a single packet is shown in Figure 5-3 on page 12. This example
shows 7-bit data (0x45), odd parity, and two stop bits.
See the ATWINC1500-MR210PA Programming Guide for information on configuring the UART.
Figure 5-3. Example of UART Rx or Tx packet
Input hold time t
IHD
5 ns
Output delay t
ODLY
0 20 ns
Slave select setup time t
SUSSN
5 ns
Slave select hold time t
HDSSN
5 ns
Table 5-3. SPI Slave Timing Parameters (Continued)
Parameter Symbol Min Max Units
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