Atmel AVR XMEGA 8/16-bit High Performance Low Power Flash Microcontrollers Datový list stáhnout pdf

Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014

Features

 High-performance, low-power Atmel

AVR

XMEGA

8- and16-bit Microcontroller

 Nonvolatile program and data memories

 64K - 128KBytes of in-system self-programmable flash

 4K - 8KBytes boot section

 2KBytes EEPROM

 4K - 8KBytes internal SRAM

 Peripheral features

 Two-channel DMA controller

 Four-channel event system

 Three 16-bit timer/counters

 Two timer/counters with four output compare or input capture channels

 One timer/counter with two output compare or input capture channels

 High resolution extensions one timer/counter

 Advanced waveform extension (AWeX) on one timer/counter

 Split mode on two timer/counters

 One USB device interface

 USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant

 32 endpoints with full configuration flexibility

 Two USARTs with IrDA support for one USART

 AES and DES crypto engine

 CRC-16 (CRC-CCITT) and CRC-32 (IEEE

802.3) generator

 One two-wire interface with dual address match (I

C and SMBus compatible)

 One serial peripheral interface (SPI)

 16-bit Real Time Counter (RTC) with separate oscillator

 Liquid Crystal Display (LCD)

 Up to 4x40 segment driver

 Built in contrast control

 ASCII character mapping

 Flexible SWAP of segment and common terminals buses

 Two eight-channel, 12-bit, three hundred thousand SPS Analog to Digital Converters

 Four Analog Comparators with window compare function, and current source feature

 External interrupts on all general purpose I/O pins

 Programmable watchdog timer with separate on-chip ultra low power oscillator

 QTouch

library support

 Capacitive touch buttons, sliders and wheels

 Special microcontroller features

 Power-on reset and programmable brown-out detection

 Internal and external clock options with PLL

 Programmable multilevel interrupt controller

 Five sleep modes

 Programming and debug interfaces

 JTAG (IEEE 1149.1 Compliant) interface, including boundary scan

 PDI (Program and Debug Interface)

 I/O and packages

 53 Programmable I/O pins

 100-lead TQFP, 100-ball VFBGA

Atmel AVR XMEGA B1 8- and 16-bit Microcontroller

ATxmega128B1 / ATxmega64B1

1 2 3 4 5 6 ... 144 145

Shrnutí obsahu

Strany 1 - ATxmega128B1 / ATxmega64B1

Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Features High-performance, low-power Atmel® AVR® XMEGA® 8- and16-bit Microcontroller Nonvolatile

Strany 2 - 1. Ordering Information

10XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014The Arithmetic Logic Unit (ALU) supports arithmetic and logic operations

Strany 3 - Typical Applications

100XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-19. I/O Pin Pull-up Resistor Current vs. Pin VoltageVCC = 3.3V

Strany 4 - 2. Pinout/Block Diagram

101XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-21. I/O Pin Output Voltage vs. Source Current VCC = 3.0V.Figure 37

Strany 5 - Bottom view

102XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-23. I/O Pin Output Voltage vs. Sink CurrentVCC = 1.8V.Figure 3

Strany 6 - 3. Overview

103XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-25. I/O Pin Output Voltage vs. Sink CurrentVCC = 3.3V.37.2.3 Thres

Strany 7

104XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-27. I/O Pin Input Threshold Voltage vs. VCCVIL I/O pin read as

Strany 8 - 5. Capacitive Touch Sensing

105XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437.3 ADC CharacteristicsFigure 37-29. INL Error vs. External VREFT = 25°C, V

Strany 9 - 6. AVR CPU

106XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-31. ADC DNL vs. VREFDifferential signed mode, VCC = 3.6V exter

Strany 10 - 6.4.1 Hardware Multiplier

107XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-33. ADC Offset vs. VCC.SE Unsigned mode, VREF = 1.0V, external ref

Strany 11

108XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-35. ADC Offset vs. VREF.Differential signed mode, VCC = 3.6V,

Strany 12 - 7. Memories

109XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-37. ADC Gain Error vs. VREF.Differential signed mode, external ref

Strany 13 - 7.3.3 Boot Loader Section

11XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20146.5 Program FlowAfter reset, the CPU starts to execute instructions from the

Strany 14 - 7.3.5 User Signature Row

110XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-39. ADC Gain Error vs. VCC.Differential signed mode, external

Strany 15

111XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-41. ADC Gain Error vs. TemperatureDifferential signed mode, extern

Strany 16

112XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.4 Analog Comparator CharacteristicsFigure 37-43. Analog Comparator Hy

Strany 17

113XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-45. Analog Comparator Propagation Delay vs. VCCHigh speed mode.Fig

Strany 18 - 9. Event System

114XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-47. Analog Comparator Voltage Scaler vs. SCALEFACT = 25°C.Figu

Strany 19

115XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-49. Analog Comparator Current Source vs. CalibrationVCC = 3.0V, do

Strany 20

116XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.6 BOD CharacteristicsFigure 37-51. BOD Thresholds vs. TemperatureBOD

Strany 21

117XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-53. BOD Thresholds vs. Temperature BOD level = 3.0V.Figure 37-54.

Strany 22

118XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-55. BOD Current Consumption vs. VCCSampled mode, BOD level = 1

Strany 23 - 11.3.2 Power-down Mode

119XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-57. Reset Pin Pull-up Resistor Current vs. Reset Pin VoltageVCC =

Strany 24 - 11.3.5 Extended Standby Mode

12XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20147. Memories7.1 Features Flash program memory One linear address space

Strany 25 - 12. System Control and Reset

120XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-59. Reset Pin Pull-up Resistor Current vs. Reset Pin VoltageVC

Strany 26

121XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-61. Reset Pin Input Threshold Voltage vs. VCCVIL - Reset pin read

Strany 27 - 13. WDT – Watchdog Timer

122XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.8 Oscillator Characteristics37.8.1 Ultra Low-power Internal Oscillato

Strany 28

123XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-64. 32.768kHz Internal Oscillator Calibration Step SizeT = -40°C t

Strany 29

124XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.8.3 2MHz Internal OscillatorFigure 37-66. 2MHz Internal Oscillator Fr

Strany 30 - 15. I/O Ports

125XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-68. 2MHz Internal Oscillator CALA Calibration Step SizeVCC= 3V.Fig

Strany 31

126XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.8.4 32MHz Internal OscillatorFigure 37-70. 32MHz Internal Oscillator

Strany 32 - 15.3.5 Others

127XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-72. 32MHz Internal Oscillator CALA Calibration Step SizeVCC= 3.0V.

Strany 33

128XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-74. 32MHz Internal Oscillator Frequency vs. CALA Calibration V

Strany 34

129XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437.8.5 32MHz Internal Oscillator Calibrated to 48MHzFigure 37-76. 48MHz Inte

Strany 35

13XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20147.3 Flash Program MemoryThe Atmel AVR XMEGA devices contain on-chip, in-syste

Strany 36

130XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-78. 32MHz Internal Oscillator CALA Calibration Step SizeUsing

Strany 37

131XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437.9 PDI CharacteristicsFigure 37-80. Maximum PDI Frequency vs. VCC105°C85°C

Strany 38

132XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.10 LCD CharacteristicsFigure 37-81. ICC vs. Frame Rate32Hz Low Power

Strany 39

133XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-83. ICC vs. Frame Rate 0pF load. Figure 37-84. ICC vs. Contrast32H

Strany 40

134XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-85. ICC vs. Contrast32Hz Low Power Frame Rate from 32.768kHz T

Strany 41

135XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-87. PSAVE LCD LP 32Hz vs. TemperatureRTC, WDT, BOD sampled.Figure

Strany 42 - 22. TWI – Two-wire Interface

136XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201438. Errata38.1 ATxmega64B1, ATxmega128B138.1.1 Rev. C•Device revision nu

Strany 43

137XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Problem fix/WorkaroundThe TxD pin direction can be set to input using the Po

Strany 44 - 24. USART

138XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201439. Datasheet Revision HistoryNote that the referring page numbers in th

Strany 45

139XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201439.5 8330D – 01/201339.6 8330C – 07/201239.7 8330B – 02/201239.8 8330A – 10/

Strany 46 - 26. AES and DES Crypto Engine

14XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20147.3.4 Production Signature RowThe production signature row is a separate

Strany 47

140XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014

Strany 48

iXMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Table Of ContentsFeatures . . . . . . . . . . . . . . . . . . . . . . . . . .

Strany 49

iiXMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201411. Power Management and Sleep Modes . . . . . . . . . . . . . . . . . . .

Strany 50

iiiXMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201422.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Strany 51 - 30. AC – Analog Comparator

ivXMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.4 Wake-up Time from Sleep Modes . . . . . . . . . . . . . . . . . . . . .

Strany 52 - Figure 30-2

Strany 53 - 31. Programming and Debugging

15XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 7-2. Data Memory Map (hexadecimal address)7.6 EEPROMAtmel AVR XMEGA B1

Strany 54 - 32. Pinout and Pin Functions

16XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20147.11 JTAG DisableIt is possible to disable the JTAG interface from the ap

Strany 55

17XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20148. DMAC – Direct Memory Access Controller8.1 Features Allows high speed data

Strany 56

18XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20149. Event System9.1 Features System for direct peripheral-to-peripheral c

Strany 57

19XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 9-1. Event System Overview and Connected PeripheralsThe event routing

Strany 58

2XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014 Operating voltage 1.6 – 3.6V Operating frequency 0 – 12MHz from 1.6V

Strany 59

20XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201410. System Clock and Clock Options10.1 Features Fast start-up time Safe

Strany 60

21XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 10-1. The Clock System, Clock Sources, and Clock Distribution10.3 Cloc

Strany 61

22XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201410.3.2 32.768kHz Calibrated Internal OscillatorThis oscillator provides a

Strany 62 - 34. Instruction Set Summary

23XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201411. Power Management and Sleep Modes11.1 Features Power management for adjus

Strany 63

24XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201411.3.3 Power-save ModePower-save mode is identical to power down, with tw

Strany 64

25XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201412. System Control and Reset12.1 Features Reset the microcontroller and set

Strany 65

26XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201412.4.2 Brownout DetectionThe on-chip brownout detection (BOD) circuit mon

Strany 66

27XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201413. WDT – Watchdog Timer13.1 Features Issues a device reset if the timer is

Strany 67 - 35. Packaging Information

28XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201414. Interrupts and Programmable Multilevel Interrupt Controller14.1 Featu

Strany 68 - 35.2 7A1

29XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20140x028 TCC1_INT_base Timer/Counter 1 on port C Interrupt base0x030 SPIC_INT_ve

Strany 69

3XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Typical ApplicationsIndustrial control Climate control Low power battery appli

Strany 70 - Safe Operating Area

30XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201415. I/O Ports15.1 Features 53 general purpose input and output pins with

Strany 71 - 36.3 DC Characteristics

31XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201415.3.1 Push-pullFigure 15-1. I/O Configuration - Totem-pole15.3.2 Pull-downFi

Strany 72

32XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 15-4. I/O Configuration - Totem-pole with Bus-keeper15.3.5 OthersF

Strany 73

33XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201415.4 Input SensingInput sensing is synchronous or asynchronous depending on t

Strany 74 - Wake-up time

34XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201416. T/C – 16-bit Timer/Counter Type 0 and 116.1 Features Three 16-bit ti

Strany 75 - 36.5 I/O Pin Characteristics

35XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Only Timer/Counter 0 has the split mode feature that split it into two 8-bit

Strany 76 - 36.7 ADC Characteristics

36XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201417. TC2 –16-bit Timer/Counter Type 217.1 Features A system of two 8-bit

Strany 77

37XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201418. AWeX – Advanced Waveform Extension18.1 Features Waveform output with com

Strany 78

38XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201419. Hi-Res – High Resolution Extension19.1 Features Increases waveform g

Strany 79

39XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201420. RTC – 16-bit Real-Time Counter20.1 Features 16-bit resolution Selectabl

Strany 80

4XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20142. Pinout/Block DiagramFigure 2-1. Block Diagram and PinoutNote: 1. For fu

Strany 81

40XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201421. USB – Universal Serial Bus Interface21.1 Features One USB 2.0 full s

Strany 82

41XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Multi-packet transfer enables a data payload exceeding the maximum packet siz

Strany 83

42XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201422. TWI – Two-wire Interface22.1 Features One two-wire interface periphe

Strany 84

43XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201423. SPI – Serial Peripheral Interface23.1 Features One SPI peripheral Full-

Strany 85

44XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201424. USART24.1 Features Two Identical USART peripherals Full-duplex oper

Strany 86 - 32.768 kHz crystal

45XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201425. IRCOM – IR Communication Module25.1 Features Pulse modulation/demodulati

Strany 87 - 36.15 SPI Characteristics

46XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201426. AES and DES Crypto Engine26.1 Features Data Encryption Standard (DES

Strany 88

47XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201427. CRC – Cyclic Redundancy Check Generator27.1 Features Cyclic redundancy c

Strany 89

48XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201428. LCD - Liquid Crystal Display Controller28.1 Features Display capacit

Strany 90

49XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201429. ADC – 12-bit Analog to Digital Converter29.1 Features Two Analog to Digi

Strany 91 - 37. Typical Characteristics

5XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 2-2. VFBGA PinoutABCDEFGHJK1 2345678910ABCDEFGHJK10987654321Top viewBot

Strany 92

50XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 29-1. ADC OverviewThe ADC may be configured for 8- or 12-bit resul

Strany 93 - Temp [°C]

51XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201430. AC – Analog Comparator30.1 Features Four Analog Comparators (AC) Select

Strany 94

52XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 30-1. Analog Comparator OverviewThe window function is realized by

Strany 95

53XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201431. Programming and Debugging31.1 Features Programming External programming

Strany 96

54XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201432. Pinout and Pin FunctionsThe device pinout is shown in “Pinout/Block D

Strany 97 - Icc [µA]

55XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201432.1.5 Timer/Counter and AWEX Functions32.1.6 Communication Functions32.1.7 O

Strany 98

56XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201432.2 Alternate Pin FunctionsThe tables below show the primary/default fun

Strany 99 - 37.2 I/O Pin Characteristics

57XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Table 32-3. Port C - Alternate FunctionsNotes: 1. Pin mapping of all TC0 can

Strany 100

58XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Table 32-6. Port E - Alternate FunctionsTable 32-7. LCDPORT E PIN # INTER

Strany 101

59XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Notes: 1. Pin mapping of all Segment terminals (SEGn) can be optionally swapp

Strany 102

6XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20143. OverviewThe Atmel® AVR® XMEGA® is a family of low power, high performan

Strany 103

60XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201433. Peripheral Module Address MapThe address maps show the base address f

Strany 104 - I/O pin read as “0”

61XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20140x0800 TCC0 Timer/Counter 0 on port C0x0840 TCC1 Timer/Counter 1 on port C0x0

Strany 105 - 37.3 ADC Characteristics

62XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201434. Instruction Set SummaryMnemonics Operands Description Operation Flags

Strany 106 - Figure 37-32. ADC DNL vs. V

63XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014RCALL k Relative Call Subroutine PCPC + k + 1 None 2 / 3 (1)ICALL Indirect

Strany 107 - = 1.0V, external reference

64XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014MOVW Rd, Rr Copy Register Pair Rd+1:RdRr+1:Rr None 1LDI Rd, K Load Immed

Strany 108

65XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014ELPM Rd, Z Extended Load Program Memory Rd(RAMPZ:Z) None 3ELPM Rd, Z+Extende

Strany 109 - Gain Error [mV]

66XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Notes: 1. Cycle times for Data memory accesses assume internal memory acc

Strany 110

67XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201435. Packaging Information35.1 100A100A, 100-lead, 14 x 14mm Body Size, 1.0mm

Strany 111

68XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201435.2 7A1

Strany 112

69XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436. Electrical CharacteristicsAll typical values are measured at T = 25°C unl

Strany 113

7XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20143.1 Block DiagramFigure 3-1. XMEGA B1 Block DiagramPowerSupervisionPOR/BOD &am

Strany 114

70XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 36-1. Maximum Frequency vs. VCC1.81232MHzV2.73.61.6Safe Operating

Strany 115 - CURRENTSOURCE

71XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.3 DC CharacteristicsTable 36-4. Current Consumption for Active and Sleep M

Strany 116 - 37.6 BOD Characteristics

72XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Notes: 1. All Power Reduction Registers set.2. Maximum limits are based o

Strany 117

73XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Table 36-5. Current Consumption for Modules and PeripheralsSymbol Parameter C

Strany 118

74XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Notes: 1. All parameters measured as the difference in current consumptio

Strany 119

75XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.5 I/O Pin Characteristics The I/O pins complies with the JEDEC LVTTL and L

Strany 120

76XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201436.6 Liquid Crystal Display Characteristics Table 36-8. Liquid Crystal D

Strany 121 - THRESHOLD

77XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Table 36-11. Accuracy CharacteristicsfADCSample rateCurrent limitation (CURR

Strany 122

78XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Notes: 1. Maximum numbers are based on characterisation and not tested in

Strany 123

79XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.8 Analog Comparator CharacteristicsTable 36-13. Analog Comparator Charact

Strany 124

8XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/20144. ResourcesA comprehensive set of development tools, application notes an

Strany 125

80XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201436.10 Brownout Detection CharacteristicsTable 36-15. Brownout Detection C

Strany 126 - Frequency [MHz]

81XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.13 Flash and EEPROM Memory CharacteristicsTable 36-18. Endurance and Data

Strany 127 - Frequency Step size [%]

82XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201436.14.2 Calibrated 2MHz RC Internal Oscillator CharacteristicsTable 36-21

Strany 128

83XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.14.6 External Clock CharacteristicsFigure 36-3. External Clock Drive Wavef

Strany 129 - Frequency (MHz)

84XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Table 36-26. External Clock with Prescaler(1) for System ClockNotes: 1.

Strany 130

85XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014RQNegative impedance (1)XOSCPWR=0,FRQRANGE=00.4MHz resonator, CL=100pF 44k1M

Strany 131 - 37.9 PDI Characteristics

86XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Note: 1. Numbers for negative impedance are not tested but guaranteed fro

Strany 132 - 37.10 LCD Characteristics

87XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.15 SPI CharacteristicsFigure 36-5. SPI Timing Requirements in Master ModeF

Strany 133 - Contrast

88XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Table 36-29. SPI Timing Characteristics and RequirementsSymbol Parameter

Strany 134

89XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201436.16 Two-wire Interface CharacteristicsTable 36-30 describes the requirement

Strany 135

9XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/20146. AVR CPU6.1 Features 8/16-bit, high-performance Atmel AVR RISC CPU 142 ins

Strany 136 - 38. Errata

90XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Notes: 1. Required only for fSCL > 100kHz.2. Cb = Capacitance of one b

Strany 137 - Problem fix/Workaround

91XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437. Typical Characteristics37.1 Current Consumption37.1.1 Active Mode Supply

Strany 138

92XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-3. Active Mode Supply Current vs. VCCfSYS= 32.768kHz internal o

Strany 139 - 39.8 8330A – 10/2011

93XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-5. Active Supply Current vs. VCCfSYS= 32MHz internal oscillator pre

Strany 140

94XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/201437.1.2 Idle Mode Supply CurrentFigure 37-7. Idle Mode Supply Current vs.

Strany 141 - Table Of Contents

95XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/2014Figure 37-9. Idle Mode Supply Current vs. VCCfSYS= 32.768kHz internal oscilla

Strany 142

96XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-11.Idle Mode Supply Current vs. VCCfSYS= 32MHz internal oscilla

Strany 143

97XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437.1.3 Power-down Mode Supply CurrentFigure 37-13. Power-down Mode Supply Cur

Strany 144

98XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–AVR–12/2014Figure 37-15. Power-down Mode Supply Current vs. VCCAll functions disable

Strany 145

99XMEGA B1 [DATASHEET]Atmel-8330H-AVR-ATxmega64B1-128B1_datasheet–12/201437.2 I/O Pin Characteristics37.2.1 Pull-upFigure 37-17. I/O Pin Pull-up Resis

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