Atmel AVR XMEGA 8/16-bit High Performance Low Power Flash Microcontrollers Datový list stáhnout pdf (Strana 1)

Atmel 8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014

Features

 High-performance, low-power Atmel

AVR

XMEGA

8/16-bit Microcontroller

 Nonvolatile program and data memories

 8K –32KB of in-system self-programmable flash

 2K – 4KB boot section

 512Bytes – 1KB EEPROM

 1K – 4KB internal SRAM

 Peripheral features

 Four-channel enhanced DMA controller with 8/16-bit address match

 Eight-channel event system

 Asynchronous and synchronous signal routing

 Quadrature encoder with rotary filter

 Three 16-bit timer/counters

 One timer/counter with four output compare or input capture channels

 Two timer/counter with two output compare or input capture channels

 High resolution extension enabling down to 4ns PWM resolution

 Waveform extension for control of motor, LED, lighting, H-bridge, high drives, and more

 Fault extension for safe and deterministic handling and/or shut-down of external driver

 CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) generator

 XMEGA Custom Logic (XCL) module with timer, counter and logic functions

 Two 8-bit timer/counters with capture/compare and 16-bit cascade mode

 Connected to one USART to support custom data frame length

 Connected to I/O pins and event system to do programmable logic functions

 MUX, AND, NAND, OR, NOR, XOR, XNOR, NOT, D-Flip-Flop, D Latch, RS Latch

 Two USARTs with full-duplex and single wire half-duplex configuration

 Master SPI mode

 Support custom protocols with configurable data frame length up to 256-bit

 System wake-up from deep sleep modes when used with internal 8MHz oscillator

 One two-wire interface with dual address match (I

C and SMBus compatible)

 Bridge configuration for simultaneous master and slave operation

 Up to 1MHz bus speed support

 One serial peripheral interface (SPI)

 16-bit real time counter with separate oscillator and digital correction

 One sixteen-channel, 12-bit, 300ksps Analog to Digital Converter with:

 Offset and gain correction

 Averaging

 Over-sampling and decimation

 One two-channel, 12-bit, 1Msps Digital to Analog Converter

 Two Analog Comparators with window compare function and current sources

 External interrupts on all general purpose I/O pins

 Programmable watchdog timer with separate on-chip ultra low power oscillator

 QTouch

library support

 Capacitive touch buttons, sliders and wheels

 Special microcontroller features

 Power-on reset and programmable brown-out detection

 Internal and external clock options with PLL

 Programmable multilevel interrupt controller

 Five sleep modes

 Programming and debug interface

 PDI (Program and Debug Interface)

 I/O and Packages

 26 programmable I/O pins

 7x7mm 32-lead TQFP

 5x5mm 32-lead VQFN

 4x4mm 32-lead UQFN

 Operating Voltage

 1.6 – 3.6V

 Operating frequency

 0 – 12MHz from 1.6V

 0 – 32MHz from 2.7V

8/16-bit Atmel AVR XMEGA Microcontrollers

ATxmega32E5 / ATxmega16E5 / ATxmega8E5

DATASHEET

1 2 3 4 5 6 ... 146 147

Shrnutí obsahu

Strany 1 - DATASHEET

Atmel 8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Features High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller

Strany 2 - 1. Ordering Information

10XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014after reset, and the initial value is the highest address of

Strany 3 - 2. Typical Applications

100XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-15.Idle Mode Supply Current vs. VCCfSYS = 32MHz i

Strany 4 - 3. Pinout and Block Diagram

101XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.1.3 Power-down Mode Supply CurrentFigure 37-17.Power-dow

Strany 5 - 4. Overview

102XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-19.Power-down Mode Supply Current vs. Temperature

Strany 6 - 6. Capacitive Touch Sensing

103XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.1.5 Standby Mode Supply CurrentFigure 37-21.Standby Supp

Strany 7 - 7.3 Architectural Overview

104XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.2 I/O Pin Characteristics37.2.1 Pull-upFigure 37-23.I/O

Strany 8

105XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-25.I/O Pin Pull-up Resistor Current vs. Input Vol

Strany 9 - 7.6 Status Register

106XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-27.I/O Pin Output Voltage vs. Source Current VCC

Strany 10 - 7.8 Register File

107XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-29.I/O Pin Output Voltage vs. Source CurrentFigur

Strany 11 - 8. Memories

108XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-31.I/O Pin Output Voltage vs. Sink CurrentVCC = 3

Strany 12

109XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-33.I/O Pin Output Voltage vs. Sink Current37.2.3

Strany 13 - 8.4 Fuses and Lock Bits

11XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20148. Memories8.1 Features Flash program memory One linear ad

Strany 14 - 8.9 Memory Timing

110XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-35.I/O Pin Input Threshold Voltage vs. VCCVIH I/O

Strany 15 - 8.11 I/O Memory Protection

111XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-37.I/O Pin Input Hysteresis vs. VCC37.3 ADC Chara

Strany 16 - 9.2 Overview

112XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-39.ADC INL Error vs. VCCT = 25C, VREF = 1.0V Fig

Strany 17

113XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-41. ADC Gain Error vs. VCCT = 25C, VREF = 1.0V,

Strany 18 - 10. Event System

114XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-43. ADC Gain Error vs. TemperatureVCC = 3.6V, VRE

Strany 19

115XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-45. ADC Offset Error vs. VREFT = 25C, VCC = 3.6V

Strany 20 - 11.2 Overview

116XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.4 DAC CharacteristicsFigure 37-47.DAC INL Error vs. Exte

Strany 21

117XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-49.DNL Error vs. VCCT = 25C, VREF = 1.0V37.5 AC

Strany 22

118XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-51.Analog Comparator Hysteresis vs. VCCLarge hyst

Strany 23 - 12.3 Sleep Modes

119XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-53.Analog Comparator Propagation Delay vs. Temper

Strany 24 - 12.3.5 Extended Standby Mode

12XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014All AVR CPU instructions are 16 or 32 bits wide, and each fl

Strany 25 - 13. System Control and Reset

120XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-55.Analog Comparator Voltage Scaler vs. SCALEFACT

Strany 26

121XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-57.Analog Comparator Source vs. Calibration Value

Strany 27 - 14. WDT – Watchdog Timer

122XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.6 Internal 1.0V Reference CharacteristicsFigure 37-59.AD

Strany 28 - 15.3 Interrupt Vectors

123XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-61.BOD Thresholds vs. TemperatureBOD level = 3.0V

Strany 29

124XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-63.Reset Pin Pull-up Resistor Current vs. Reset P

Strany 30 - 16. I/O Ports

125XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-65.Reset Pin Pull-up Resistor Current vs. Reset P

Strany 31 - 16.3.3 Pull-up

126XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-67.Reset Pin Input Threshold Voltage vs. VCCVIL -

Strany 32 - 16.3.5 Others

127XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-69.Power-on Reset Current Consumption vs. VCCBOD

Strany 33

128XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.10 Oscillator Characteristics37.10.1 Ultra Low-Power Int

Strany 34 - 17.2 Overview

129XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-72. 32.768kHz Internal Oscillator Frequency vs. C

Strany 35

13XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014the corresponding peripheral registers from software. For de

Strany 36 - 18. WeX – Waveform Extension

130XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.10.3 8MHz Internal OscillatorFigure 37-74. 8MHz Internal

Strany 37

131XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-76. 8MHz Internal Oscillator CAL Calibration Step

Strany 38 - 19.2 Overview

132XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.10.4 32MHz Internal OscillatorFigure 37-78. 32MHz Intern

Strany 39 - 20. Fault Extension

133XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-80. 32MHz Internal Oscillator CALA Calibration S

Strany 40 - 21.2 Overview

134XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-82. 32MHz internal Oscillator Frequency vs. CALB

Strany 41

135XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-84. SDA Fall Time vs. VCC37.12 PDI Characteristic

Strany 42 - 22. TWI – Two-Wire Interface

136XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201438. Errata – ATxmega32E5 / ATxmega16E5 / ATxmega8E538.1 Rev

Strany 43

137XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Issue: TWI SM bus level one Master or slave remembering dat

Strany 44 - 23.2 Overview

138XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201438.2 Rev. A DAC: AREF on PD0 is not available for the DAC

Strany 45 - 24. USART

139XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Issue: ADC: Averaging is failing when channel scan is enabl

Strany 46

14XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20148.5 Data MemoryThe data memory contains the I/O memory, inte

Strany 47 - 25.2 Overview

140XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Issue: AC: Flag can not be cleared if the module is not ena

Strany 48 - 26.2 Overview

141XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201439. Revision HistoryPlease note that referring page numbers

Strany 49 - Control Registers

142XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201439.7 8153D – 06/201339.8 8153C – 05/201339.9 8153B – 04/201

Strany 50

iXMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table of ContentsFeatures . . . . . . . . . . . . . . . . .

Strany 51 - 28.2 Overview

iiXMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201412. Power Management and Sleep Modes . . . . . . . . . . . .

Strany 52

iiiXMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201423.2 Overview . . . . . . . . . . . . . . . . . . . . . . .

Strany 53 - DAC1

ivXMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.7 DAC Characteristics . . . . . . . . . . . . . . . . .

Strany 54 - 30. AC – Analog Comparator

Strany 55

15XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20148.10 Device ID and RevisionEach device has a three-byte devi

Strany 56 - 31. Programming and Debugging

16XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20149. EDMA – Enhanced DMA Controller9.1 Features The EDMA Cont

Strany 57 - 32. Pinout and Pin Functions

17XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014The EDMA controller supports extended features such as doubl

Strany 58 - 32.1.7 Debug/System Functions

18XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201410. Event System10.1 Features System for direct peripheral-

Strany 59 - 32.2 Alternate Pin Functions

19XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 10-1. Event System Overview and Connected Peripherals

Strany 60

2XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20141. Ordering InformationOrdering Code Package(1)(2)(3)Flash[By

Strany 61

20XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201411. System Clock and Clock options11.1 Features Fast start-

Strany 62

21XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 11-1. The Clock System, Clock Sources, and Clock Dist

Strany 63 - 34. Instruction Set Summary

22XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201411.3.2 32.768kHz Calibrated Internal OscillatorThis oscillat

Strany 64

23XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201412. Power Management and Sleep Modes12.1 Features Power man

Strany 65

24XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201412.3.3 Power-save ModePower-save mode is identical to power

Strany 66

25XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201413. System Control and Reset13.1 Features Reset the microco

Strany 67

26XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201413.4.2 Brownout DetectionThe on-chip brownout detection (BOD

Strany 68 - 35. Packaging Information

27XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201414. WDT – Watchdog Timer14.1 Features Issues a device reset

Strany 69 - 35.2 32Z

28XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201415. Interrupts and Programmable Multilevel Interrupt Control

Strany 70 - 35.3 32MA

29XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20140x0024 TCC5_INT_base Timer/counter 5 on port C interrupt bas

Strany 71 - 36.1 Absolute Maximum Ratings

3XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Notes: 1. This device can also be supplied in wafer form. Ple

Strany 72 - Safe Operating Area

30XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201416. I/O Ports16.1 Features 26 general purpose input and out

Strany 73 - 36.3 Current Consumption

31XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201416.3 Output DriverAll port pins (Pxn) have programmable outp

Strany 74

32XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201416.3.4 Bus-keeperThe bus-keeper’s weak output produces the s

Strany 75 - Wakeup time

33XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201416.4 Input SensingInput sensing is synchronous or asynchrono

Strany 76 - 36.6 ADC Characteristics

34XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201417. Timer Counter Type 4 and 517.1 Features Three 16-bit ti

Strany 77

35XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014There are two differences between timer/counter type 4 and t

Strany 78

36XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201418. WeX – Waveform Extension18.1 Features Module for more c

Strany 79 - 36.7 DAC Characteristics

37XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014The output override disable unit can disable the waveform ou

Strany 80

38XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201419. Hi-Res – High Resolution Extension19.1 Features Increas

Strany 81

39XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201420. Fault Extension20.1 Features Connected to timer/counter

Strany 82

4XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20143. Pinout and Block DiagramNotes: 1. For full details on pino

Strany 83

40XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201421. RTC – 16-bit Real-Time Counter21.1 Features 16-bit reso

Strany 84

41XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 21-1. Real-time Counter OverviewThe RTC also supports

Strany 85

42XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201422. TWI – Two-Wire Interface22.1 Features One two-wire inte

Strany 86

43XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014It is possible to disable the TWI drivers in the device, and

Strany 87

44XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201423. SPI – Serial Peripheral Interface23.1 Features One SPI

Strany 88

45XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201424. USART24.1 Features Two identical USART peripherals Ful

Strany 89 - 36.14 SPI Characteristics

46XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014The clock generator includes a fractional baud rate generato

Strany 90

47XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201425. IRCOM – IR Communication Module25.1 Features Pulse modu

Strany 91

48XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201426. XCL – XMEGA Custom Logic Module26.1 Features Two indepe

Strany 92

49XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014The LUT works in all sleep modes. Combined with event system

Strany 93 - 37. Typical Characteristics

5XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20144. OverviewThe Atmel AVR XMEGA is a family of low power, high

Strany 94

50XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201427. CRC – Cyclic Redundancy Check Generator27.1 Features Cy

Strany 95

51XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201428. ADC – 12-bit Analog to Digital Converter28.1 Features 1

Strany 96

52XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 28-1. ADC OverviewThe ADC may be configured for 8- or

Strany 97

53XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201429. DAC – Digital to Analog Converter29.1 Features One Digi

Strany 98

54XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201430. AC – Analog Comparator30.1 Features Two Analog Comparat

Strany 99

55XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 30-1. Analog Comparator OverviewThe window function i

Strany 100 - XMEGA E5 [DATASHEET]

56XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201431. Programming and Debugging31.1 Features Programming Ext

Strany 101

57XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201432. Pinout and Pin FunctionsThe device pinout is shown in “P

Strany 102

58XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201432.1.6 Oscillators, Clock, and Event32.1.7 Debug/System Func

Strany 103

59XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201432.2 Alternate Pin FunctionsThe tables below show the primar

Strany 104 - 37.2 I/O Pin Characteristics

6XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20145. ResourcesA comprehensive set of development tools, applica

Strany 105

60XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 32-4. PORT R – Alternate FunctionsTable 32-5. PORT D –

Strany 106

61XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201433. Peripheral Module Address MapThe address maps show the b

Strany 107

62XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20140x07E0 PORTR Port R0x0800 TCC4 Timer/Counter 4 on port C0x08

Strany 108

63XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201434. Instruction Set SummaryMnemonics Operands Description Op

Strany 109

64XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014ICALL Indirect Call to (Z)PC(15:0)PC(21:16)Z,0None 2 / 3(1

Strany 110

65XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014LDS Rd, k Load Direct from data space Rd(k) None 2(1)(2)LD

Strany 111 - 37.3 ADC Characteristics

66XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014SPM Z+ Store Program Memory and Post-Increment by 2(RAMPZ:Z)

Strany 112

67XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Notes: 1. Cycle times for data memory accesses assume intern

Strany 113

68XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201435. Packaging Information35.1 32A

Strany 114

69XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201435.2 32Z

Strany 115

7XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20147. CPU7.1 Features 8/16-bit, high-performance Atmel AVR RISC

Strany 116 - 37.4 DAC Characteristics

70XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201435.3 32MA

Strany 117 - 37.5 AC Characteristics

71XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436. Electrical CharacteristicsAll typical values are measure

Strany 118

72XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 36-1. Maximum Frequency vs. VCC1.81232MHzV2.73.61.6Sa

Strany 119

73XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.3 Current ConsumptionNotes: 1. All Power Reduction Regist

Strany 120

74XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-4. Current Consumption for Modules and PeripheralsN

Strany 121

75XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.4 Wake-up Time from Sleep ModesTable 36-5. Device Wake-up

Strany 122 - 37.7 BOD Characteristics

76XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.5 I/O Pin CharacteristicsThe I/O pins complies with the J

Strany 123

77XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-8. Clock and TimingTable 36-9. Accuracy Character

Strany 124

78XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Notes: 1. Maximum numbers are based on characterisation and

Strany 125

79XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.7 DAC CharacteristicsTable 36-11. Power Supply, Reference

Strany 126

8XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 7-1. Block Diagram of the AVR CPU ArchitectureThe arit

Strany 127

80XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-13. Accuracy CharacteristicsNote: 1. Maximum number

Strany 128

81XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.9 Bandgap and Internal 1.0V Reference CharacteristicsTabl

Strany 129

82XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.10 External Reset CharacteristicsTable 36-16. External Re

Strany 130

83XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-19. Programming TimeNotes: 1. Programming is timed

Strany 131

84XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.13 Clock and Oscillator Characteristics36.13.1 Calibrated

Strany 132

85XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.13.5 Internal Phase Locked Loop (PLL) CharacteristicsTabl

Strany 133

86XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-26. External Clock with Prescaler (1) for System Cl

Strany 134

87XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Frequency errorXOSCPWR=0FRQRANGE=0 <0.1%FRQRANGE=1 <0.

Strany 135 - 37.12 PDI Characteristics

88XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Note: 1. Numbers for negative impedance are not tested in pr

Strany 136 - 38.1 Rev. B

89XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.14 SPI CharacteristicsFigure 36-5. SPI Timing Requirement

Strany 137

9XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/20147.4 ALU - Arithmetic Logic UnitThe arithmetic logic unit (ALU

Strany 138 - 38.2 Rev. A

90XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Table 36-29. SPI Timing Characteristics and RequirementsSymb

Strany 139 - Workaround:

91XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201436.15 Two-Wire Interface CharacteristicsTable 36-6 on page 7

Strany 140

92XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Notes: 1. Required only for fSCL > 100kHz.2. Cb = Capacit

Strany 141 - 39. Revision History

93XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437. Typical Characteristics37.1 Current Consumption37.1.1 Ac

Strany 142 - 39.10 8153A – 04/2013

94XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-3. Active Mode Supply Current vs. VCCfSYS = 32.768

Strany 143 - Table of Contents

95XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-5. Active Mode Supply Current vs. VCCfSYS = 8MHz i

Strany 144

96XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-7. Active mode Supply Current vs. VCCfSYS = 32MHz

Strany 145

97XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/201437.1.2 Idle Mode Supply CurrentFigure 37-9. Idle Mode Supply

Strany 146

98XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-11.Idle Mode Supply Current vs. VCCfSYS = 32.768kH

Strany 147

99XMEGA E5 [DATASHEET]Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014Figure 37-13.Idle Mode Supply Current vs. VCCfSYS = 8MHz int

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